To recap what he's saying above: the redesign of the P3 into the P4 involved removing some fairly basic math instruction subprocessors and emulating them with less efficient processors, so that those processes would now take more time to execute. Since most of the compilers out there for x86 were built around optimization based on the existence of the subprocessors, the resulting compiled code isn't as efficient as it's supposed to be. The Tom's Hardware article I'm paraphrasing went on to say that the benefits of the PPC RISC architecture have been hamstrung by the overhead which is why they're not as fast as they could be compared to the x86/Pentium CISC legacy.